With the trend toward higher and higher integration of semiconductor devices, the width dimension of contact holes or via holes becomes smaller. Accordingly, the aspect ratios of these contact holes or via holes are increasing.
With the increase of the aspect ratios of the contact holes or the via holes, it becomes more difficult to completely fill the contact hole or the via holes with metal material without leaving any voids.
Conventional techniques for forming these contact holes in semiconductor devices are described in U.S. Pat. No. 6,551,445, U.S. Pat. No. 6,030,667, U.S. Pat. No. 5,658,425, U.S. Pat. No. 5,302,266, and U.S. Pat. No. 5,189,446.
FIG. 1 is a sectional view illustrating a conventional method for forming contact holes in a semiconductor device. As shown in that figure, after performing a typical MOS transistor fabrication process for forming a gate 2 of a predetermined width on a silicon wafer 1 defined as an active area of the device, a silicide 3 is formed on the top surfaces of the gate 2 and the silicon wafer 1 in the active area.
Next, a metal insulation film 4 is thickly formed on the entire top surface of the silicon wafer 1. The metal insulation film 4 is then planarized by a chemical and mechanical polishing process.
After a contact hole 100 is formed by selectively etching the metal insulation film 4, a barrier metal film 5 is formed on an inner wall of the contact hole 100. Metal material 6 for filling the contact hole 100 is then formed on the barrier metal film.
When the metal insulation film 4 is etched by a conventional method, a top edge of the formed contact hole has a shape close to a right angle.
Because the aspect ratio of the contact hole 100 is relatively large, the barrier metal film 5 is not deposited at a uniform thickness on the inner wall of the contact hole. Accordingly, the barrier metal film 5 is deposited more thickly at an inlet portion of the contact hole 100 than at a deep portion of the contact hole 100 and an overhang occurs.
Due to the overhang, when the metal material 6 is formed to fill the contact hole 100, the inlet portion of the contact hole 100 is blocked before the deep portion of the contact hole 100 is completely filled. As a result, a void 200, (i.e., an empty space in which the metal material is not filled), remains in the contact hole 100.
Impurities may enter such a void 200 during subsequent processes. These impurities may result in a fatal error in the operation of the semiconductor device.